Silicon Labs /EFR32MG21A010F512IM32 /USART2_NS /IEN

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Interpret as IEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXC)TXC 0 (TXBL)TXBL 0 (RXDATAV)RXDATAV 0 (RXFULL)RXFULL 0 (RXOF)RXOF 0 (RXUF)RXUF 0 (TXOF)TXOF 0 (TXUF)TXUF 0 (PERR)PERR 0 (FERR)FERR 0 (MPAF)MPAF 0 (SSM)SSM 0 (CCF)CCF 0 (TXIDLE)TXIDLE 0 (TCMP0)TCMP0 0 (TCMP1)TCMP1 0 (TCMP2)TCMP2

Description

No Description

Fields

TXC

TX Complete Interrupt Enable

TXBL

TX Buffer Level Interrupt Enable

RXDATAV

RX Data Valid Interrupt Enable

RXFULL

RX Buffer Full Interrupt Enable

RXOF

RX Overflow Interrupt Enable

RXUF

RX Underflow Interrupt Enable

TXOF

TX Overflow Interrupt Enable

TXUF

TX Underflow Interrupt Enable

PERR

Parity Error Interrupt Enable

FERR

Framing Error Interrupt Enable

MPAF

Multi-Processor Address Frame Interrupt

SSM

Chip-Select In Main Mode Interrupt Flag

CCF

Collision Check Fail Interrupt Enable

TXIDLE

TX Idle Interrupt Enable

TCMP0

Timer comparator 0 Interrupt Enable

TCMP1

Timer comparator 1 Interrupt Enable

TCMP2

Timer comparator 2 Interrupt Enable

Links

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